1. Field of the Invention
The present invention relates to a driving circuit of a power FET (Field Effect Transistor), and more particularly of FET power switching circuits.
2. Description of the Prior Art
Power semiconductor devices are widely used in ON/OFF control systems, as for instance in switching power supplies, in control systems to drive motors, electromagnets and so on. They are connected in series to a power supply and to a load and are switched on/off by a suitable control circuit responsive to the level of one or more quantities related to the load, such as the flowing current or the supply voltage. More particularly a switching power supply is fed by an unregulated source and must supply a regulated continuous voltage independently of the load changes. The input voltage is applied intermittently with a predetermined period utilizing a switch and an inductor, to a capacitor which is charged to a prefixed voltage value. Within the intermittent period the switch is ON (and therefore the LC system is fed) for a time interval which varies in accordance to the error between the charge voltage of the capacitor and the prefixed voltage value. The ratio between the time interval when the switch is ON and the preestablished intermittent period is called a duty cycle. The LC system acts as an energy accumulator and filter from which the load draws electrical energy at a voltage determined by the charge voltage of the capacitor. In other words, the capacitor is intermittently charged and tends to discharge because of the load. The load is therefore fed with a voltage subject to changes (ripple). To reduce to a minimum the voltage ripple it is necessary to use LC filters of high capacity and time constant and/or high intermittent frequencies for charging the capacitor. The last solution is preferable because the use of high filter capacities and inductances reduces the answer rate of the regulation system to the transients.
Up to now bipolar transistors have been widely used as switching devices operating in a frequency range from 20 to 35 KHz. Higher switching frequencies have not been generally used because of the high switching time of such transistors. In recent years power field effect transistors or FETs have been available on the market. Such FETs, besides requiring a low driving current, allow very high operative switching frequencies (up to 200 KHz) and, under the same switching frequencies, present losses much lower than those of the bipolar transistors. As to the switching power supplies, the advantage of using such devices to reduce the output voltage ripple and the value of the output capacitor is obvious. The semiconductor power switches are generally driven through a transformer because this offers several advantages, such as impedance matching, DC isolation and either step up or step down capability. Unfortunately a transformer, because of the core saturation, can deliver only AC driving signals and therefore switch on the semiconductor switch devices coupled to it only for time intervals less than the period of the driving signal. Unless complex demagnetization circuits are used, the duty cycle of this type of driven switches cannot exceed 50% without incurring obvious disadvantages as to the ripple and the instantaneous power to be delivered by the unregulated voltage source. On the other hand, higher duty cycle values allow both feeding the load through the switching device with a wide range of voltages and obtaining a faster answer to the transient of the output quantity which is controlled. In order to obtain large duty-cycle ratios it is necessary to feed the driving transformer through complex circuits or to replace it with other devices, as for example, optical couplers to provide the necessary drive isolation. However such optical couplers, besides having a low noise immunity and a higher output impedance, also require additional voltage sources which make for a more complex and expensive driving circuit. Moreover, when a power FET is used as a switching device, the high output impedance of an optical coupler seriously compromises the switching speed of such FET, said speed depending on the charging and discharging of the intrinsic gate-source capacitance. In order to obtain the advantages from the use of a driving transformer for a power FET (also in case large duty-cycle ratios are required) the bood "HEXFET.RTM. DATABOOK--Power mosfet application and product data 1982-1983", published by the firm, INTERNATIONAL RECTIFIER, discloses on pages A128, A129 a driving circuit wherein a control signal, which alternately varies between a voltage +V and -V, commands through a transformer the switching of a power FET. During the positive alternation of the control signal, the intrinsic gate-source capacitance of the FET rapidly charges through a diode and switches ON such FET. This charge is kept, and therefore the FET remains ON, even if the transformer core saturates. During the negative alternation, the intrinsic capacitance of the FET rapidly discharges through an additional FET which is switched ON. This solution, besides requiring some components of the primary winding of the transformer to limit the saturation current of such transformer, is not very reliable because of possible leakage paths through which the intrinsic gate-source capacitance of the FET may discharge during the time interval when the transformer is in saturation. Then the reliability of the above solution tends to become less if some protection circuits between gate and source of the FET are required. In fact, such protection circuits reduce the equivalent impedance on the ends of the intrinsic gate-source capacitance of the FET. Additionally the above-mentioned solution has a limited immunity to the noise which may drift on the FET gate through the intrinsic drain-gate capacitance. These disadvantages are overcome by the driving circuit of the present invention wherein the power FET, used as a switching device, operates within a range of duty-cycle variations from 0% to 100% and wherein the driving transformer, also for very large duty-cycle ratios, never is brought to saturation and the charge of the intrinsic gate-source capacitance of the FET is sustained by a control voltage during the time such FET is On.